From 4b84792bd21982921315c9e6f4238411fea9c6d9 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?J=C3=BCrgen=20Buchm=C3=BCller?= Date: Thu, 13 Jun 2019 14:36:41 +0200 Subject: [PATCH] qt: fix build for ppc* MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Jürgen Buchmüller --- srcpkgs/qt/patches/powerpc.patch | 754 +++++++++++++++++++++++++++++++ srcpkgs/qt/template | 8 + 2 files changed, 762 insertions(+) create mode 100644 srcpkgs/qt/patches/powerpc.patch diff --git a/srcpkgs/qt/patches/powerpc.patch b/srcpkgs/qt/patches/powerpc.patch new file mode 100644 index 00000000000..b3b0e313571 --- /dev/null +++ b/srcpkgs/qt/patches/powerpc.patch @@ -0,0 +1,754 @@ +Source: @pullmoll +Upstream: no (Qt4 is dead) +Reason: Implement atomic operations like it was done for aarch64 using gcc builtins + +diff -rub qt.orig/src/corelib/arch/powerpc/arch.pri qt/src/corelib/arch/powerpc/arch.pri +--- qt.orig/src/corelib/arch/powerpc/arch.pri 2015-05-07 16:14:48.000000000 +0200 ++++ qt/src/corelib/arch/powerpc/arch.pri 2019-06-13 13:29:09.168289246 +0200 +@@ -1,10 +1,4 @@ + # + # PowerPC architecture + # +-!*-g++* { +- *-64 { +- SOURCES += $$QT_ARCH_CPP/qatomic64.s +- } else { +- SOURCES += $$QT_ARCH_CPP/qatomic32.s +- } +-} ++SOURCES += $$QT_ARCH_CPP/qatomic_powerpc.cpp +diff -rub qt.orig/src/corelib/arch/qatomic_powerpc.h qt/corelib/arch/qatomic_powerpc.h +--- qt.orig/src/corelib/arch/qatomic_powerpc.h 2015-05-07 16:14:48.000000000 +0200 ++++ qt/src/corelib/arch/qatomic_powerpc.h 2019-06-13 13:30:55.499295070 +0200 +@@ -101,546 +101,233 @@ + Q_INLINE_TEMPLATE bool QBasicAtomicPointer::isFetchAndAddWaitFree() + { return false; } + +-#if defined(Q_CC_GNU) +- +-#if __GNUC__ < 4 || (__GNUC__ == 4 && __GNUC_MINOR__ < 2) \ +- || (!defined(__64BIT__) && !defined(__powerpc64__) && !defined(__ppc64__)) +-# define _Q_VALUE "0, %[_q_value]" +-# define _Q_VALUE_MEMORY_OPERAND "+m" (_q_value) +-# define _Q_VALUE_REGISTER_OPERAND [_q_value] "r" (&_q_value), +-#else +-// On 64-bit with gcc >= 4.2 +-# define _Q_VALUE "%y[_q_value]" +-# define _Q_VALUE_MEMORY_OPERAND [_q_value] "+Z" (_q_value) +-# define _Q_VALUE_REGISTER_OPERAND ++#ifndef Q_DATA_MEMORY_BARRIER ++# define Q_DATA_MEMORY_BARRIER asm volatile("sync\n":::"memory") ++#endif ++#ifndef Q_COMPILER_MEMORY_BARRIER ++# define Q_COMPILER_MEMORY_BARRIER asm volatile("":::"memory") + #endif + + inline bool QBasicAtomicInt::ref() + { +- register int originalValue; +- register int newValue; +- asm volatile("lwarx %[originalValue]," _Q_VALUE "\n" +- "addi %[newValue], %[originalValue], %[one]\n" +- "stwcx. %[newValue]," _Q_VALUE "\n" +- "bne- $-12\n" +- : [originalValue] "=&b" (originalValue), +- [newValue] "=&r" (newValue), +- _Q_VALUE_MEMORY_OPERAND +- : _Q_VALUE_REGISTER_OPERAND +- [one] "i" (1) +- : "cc", "memory"); ++ int newValue; ++ ++ Q_COMPILER_MEMORY_BARRIER; ++ newValue = __atomic_add_fetch(&_q_value, 1, __ATOMIC_ACQ_REL); ++ Q_COMPILER_MEMORY_BARRIER; ++ + return newValue != 0; + } + + inline bool QBasicAtomicInt::deref() + { +- register int originalValue; +- register int newValue; +- asm volatile("lwarx %[originalValue]," _Q_VALUE "\n" +- "addi %[newValue], %[originalValue], %[minusOne]\n" +- "stwcx. %[newValue]," _Q_VALUE "\n" +- "bne- $-12\n" +- : [originalValue] "=&b" (originalValue), +- [newValue] "=&r" (newValue), +- _Q_VALUE_MEMORY_OPERAND +- : _Q_VALUE_REGISTER_OPERAND +- [minusOne] "i" (-1) +- : "cc", "memory"); ++ int newValue; ++ ++ Q_COMPILER_MEMORY_BARRIER; ++ newValue = __atomic_sub_fetch(&_q_value, 1, __ATOMIC_ACQ_REL); ++ Q_COMPILER_MEMORY_BARRIER; ++ + return newValue != 0; + } + + inline bool QBasicAtomicInt::testAndSetRelaxed(int expectedValue, int newValue) + { +- register int result; +- asm volatile("lwarx %[result]," _Q_VALUE "\n" +- "xor. %[result], %[result], %[expectedValue]\n" +- "bne $+12\n" +- "stwcx. %[newValue]," _Q_VALUE "\n" +- "bne- $-16\n" +- : [result] "=&r" (result), +- _Q_VALUE_MEMORY_OPERAND +- : _Q_VALUE_REGISTER_OPERAND +- [expectedValue] "r" (expectedValue), +- [newValue] "r" (newValue) +- : "cc", "memory"); +- return result == 0; +-} ++ bool val; + +-inline bool QBasicAtomicInt::testAndSetAcquire(int expectedValue, int newValue) +-{ +- register int result; +- asm volatile("lwarx %[result]," _Q_VALUE "\n" +- "xor. %[result], %[result], %[expectedValue]\n" +- "bne $+16\n" +- "stwcx. %[newValue]," _Q_VALUE "\n" +- "bne- $-16\n" +- "isync\n" +- : [result] "=&r" (result), +- _Q_VALUE_MEMORY_OPERAND +- : _Q_VALUE_REGISTER_OPERAND +- [expectedValue] "r" (expectedValue), +- [newValue] "r" (newValue) +- : "cc", "memory"); +- return result == 0; +-} +- +-inline bool QBasicAtomicInt::testAndSetRelease(int expectedValue, int newValue) +-{ +- register int result; +- asm volatile("eieio\n" +- "lwarx %[result]," _Q_VALUE "\n" +- "xor. %[result], %[result], %[expectedValue]\n" +- "bne $+12\n" +- "stwcx. %[newValue]," _Q_VALUE "\n" +- "bne- $-16\n" +- : [result] "=&r" (result), +- _Q_VALUE_MEMORY_OPERAND +- : _Q_VALUE_REGISTER_OPERAND +- [expectedValue] "r" (expectedValue), +- [newValue] "r" (newValue) +- : "cc", "memory"); +- return result == 0; ++ Q_COMPILER_MEMORY_BARRIER; ++ val = __atomic_compare_exchange_n (&_q_value, &expectedValue, newValue, ++ false, __ATOMIC_RELAXED, __ATOMIC_RELAXED); ++ Q_COMPILER_MEMORY_BARRIER; ++ return val; + } + + inline int QBasicAtomicInt::fetchAndStoreRelaxed(int newValue) + { +- register int originalValue; +- asm volatile("lwarx %[originalValue]," _Q_VALUE "\n" +- "stwcx. %[newValue]," _Q_VALUE "\n" +- "bne- $-8\n" +- : [originalValue] "=&r" (originalValue), +- _Q_VALUE_MEMORY_OPERAND +- : _Q_VALUE_REGISTER_OPERAND +- [newValue] "r" (newValue) +- : "cc", "memory"); +- return originalValue; +-} +- +-inline int QBasicAtomicInt::fetchAndStoreAcquire(int newValue) +-{ +- register int originalValue; +- asm volatile("lwarx %[originalValue]," _Q_VALUE "\n" +- "stwcx. %[newValue]," _Q_VALUE "\n" +- "bne- $-8\n" +- "isync\n" +- : [originalValue] "=&r" (originalValue), +- _Q_VALUE_MEMORY_OPERAND +- : _Q_VALUE_REGISTER_OPERAND +- [newValue] "r" (newValue) +- : "cc", "memory"); +- return originalValue; +-} +- +-inline int QBasicAtomicInt::fetchAndStoreRelease(int newValue) +-{ +- register int originalValue; +- asm volatile("eieio\n" +- "lwarx %[originalValue]," _Q_VALUE "\n" +- "stwcx. %[newValue]," _Q_VALUE "\n" +- "bne- $-8\n" +- : [originalValue] "=&r" (originalValue), +- _Q_VALUE_MEMORY_OPERAND +- : _Q_VALUE_REGISTER_OPERAND +- [newValue] "r" (newValue) +- : "cc", "memory"); +- return originalValue; ++ int val; ++ Q_COMPILER_MEMORY_BARRIER; ++ val = __atomic_exchange_n(&_q_value, newValue, __ATOMIC_RELAXED); ++ Q_COMPILER_MEMORY_BARRIER; ++ return val; + } + + inline int QBasicAtomicInt::fetchAndAddRelaxed(int valueToAdd) + { +- register int originalValue; +- register int newValue; +- asm volatile("lwarx %[originalValue]," _Q_VALUE "\n" +- "add %[newValue], %[originalValue], %[valueToAdd]\n" +- "stwcx. %[newValue]," _Q_VALUE "\n" +- "bne- $-12\n" +- : [originalValue] "=&r" (originalValue), +- [newValue] "=&r" (newValue), +- _Q_VALUE_MEMORY_OPERAND +- : _Q_VALUE_REGISTER_OPERAND +- [valueToAdd] "r" (valueToAdd) +- : "cc", "memory"); +- return originalValue; ++ int val; ++ Q_COMPILER_MEMORY_BARRIER; ++ val = __atomic_fetch_add(&_q_value, valueToAdd, __ATOMIC_RELAXED); ++ Q_COMPILER_MEMORY_BARRIER; ++ return val; + } + +-inline int QBasicAtomicInt::fetchAndAddAcquire(int valueToAdd) +-{ +- register int originalValue; +- register int newValue; +- asm volatile("lwarx %[originalValue]," _Q_VALUE "\n" +- "add %[newValue], %[originalValue], %[valueToAdd]\n" +- "stwcx. %[newValue]," _Q_VALUE "\n" +- "bne- $-12\n" +- "isync\n" +- : [originalValue] "=&r" (originalValue), +- [newValue] "=&r" (newValue), +- _Q_VALUE_MEMORY_OPERAND +- : _Q_VALUE_REGISTER_OPERAND +- [valueToAdd] "r" (valueToAdd) +- : "cc", "memory"); +- return originalValue; +-} +- +-inline int QBasicAtomicInt::fetchAndAddRelease(int valueToAdd) +-{ +- register int originalValue; +- register int newValue; +- asm volatile("eieio\n" +- "lwarx %[originalValue]," _Q_VALUE "\n" +- "add %[newValue], %[originalValue], %[valueToAdd]\n" +- "stwcx. %[newValue]," _Q_VALUE "\n" +- "bne- $-12\n" +- : [originalValue] "=&r" (originalValue), +- [newValue] "=&r" (newValue), +- _Q_VALUE_MEMORY_OPERAND +- : _Q_VALUE_REGISTER_OPERAND +- [valueToAdd] "r" (valueToAdd) +- : "cc", "memory"); +- return originalValue; +-} +- +-#if defined(__64BIT__) || defined(__powerpc64__) || defined(__ppc64__) +-# define LPARX "ldarx" +-# define STPCX "stdcx." +-#else +-# define LPARX "lwarx" +-# define STPCX "stwcx." +-#endif +- + template + Q_INLINE_TEMPLATE bool QBasicAtomicPointer::testAndSetRelaxed(T *expectedValue, T *newValue) + { +- register void *result; +- asm volatile(LPARX" %[result]," _Q_VALUE "\n" +- "xor. %[result], %[result], %[expectedValue]\n" +- "bne $+12\n" +- STPCX" %[newValue]," _Q_VALUE "\n" +- "bne- $-16\n" +- : [result] "=&r" (result), +- _Q_VALUE_MEMORY_OPERAND +- : _Q_VALUE_REGISTER_OPERAND +- [expectedValue] "r" (expectedValue), +- [newValue] "r" (newValue) +- : "cc", "memory"); +- return result == 0; +-} +- +-template +-Q_INLINE_TEMPLATE bool QBasicAtomicPointer::testAndSetAcquire(T *expectedValue, T *newValue) +-{ +- register void *result; +- asm volatile(LPARX" %[result]," _Q_VALUE "\n" +- "xor. %[result], %[result], %[expectedValue]\n" +- "bne $+16\n" +- STPCX" %[newValue]," _Q_VALUE "\n" +- "bne- $-16\n" +- "isync\n" +- : [result] "=&r" (result), +- _Q_VALUE_MEMORY_OPERAND +- : _Q_VALUE_REGISTER_OPERAND +- [expectedValue] "r" (expectedValue), +- [newValue] "r" (newValue) +- : "cc", "memory"); +- return result == 0; +-} +- +-template +-Q_INLINE_TEMPLATE bool QBasicAtomicPointer::testAndSetRelease(T *expectedValue, T *newValue) +-{ +- register void *result; +- asm volatile("eieio\n" +- LPARX" %[result]," _Q_VALUE "\n" +- "xor. %[result], %[result], %[expectedValue]\n" +- "bne $+12\n" +- STPCX" %[newValue]," _Q_VALUE "\n" +- "bne- $-16\n" +- : [result] "=&r" (result), +- _Q_VALUE_MEMORY_OPERAND +- : _Q_VALUE_REGISTER_OPERAND +- [expectedValue] "r" (expectedValue), +- [newValue] "r" (newValue) +- : "cc", "memory"); +- return result == 0; ++ bool val; ++ Q_COMPILER_MEMORY_BARRIER; ++ val = __atomic_compare_exchange_n (&_q_value, &expectedValue, newValue, ++ false, __ATOMIC_RELAXED, __ATOMIC_RELAXED); ++ Q_COMPILER_MEMORY_BARRIER; ++ return val; + } + + template + Q_INLINE_TEMPLATE T *QBasicAtomicPointer::fetchAndStoreRelaxed(T *newValue) + { +- register T *originalValue; +- asm volatile(LPARX" %[originalValue]," _Q_VALUE "\n" +- STPCX" %[newValue]," _Q_VALUE "\n" +- "bne- $-8\n" +- : [originalValue] "=&r" (originalValue), +- _Q_VALUE_MEMORY_OPERAND +- : _Q_VALUE_REGISTER_OPERAND +- [newValue] "r" (newValue) +- : "cc", "memory"); +- return originalValue; +-} +- +-template +-Q_INLINE_TEMPLATE T *QBasicAtomicPointer::fetchAndStoreAcquire(T *newValue) +-{ +- register T *originalValue; +- asm volatile(LPARX" %[originalValue]," _Q_VALUE "\n" +- STPCX" %[newValue]," _Q_VALUE "\n" +- "bne- $-8\n" +- "isync\n" +- : [originalValue] "=&r" (originalValue), +- _Q_VALUE_MEMORY_OPERAND +- : _Q_VALUE_REGISTER_OPERAND +- [newValue] "r" (newValue) +- : "cc", "memory"); +- return originalValue; +-} +- +-template +-Q_INLINE_TEMPLATE T *QBasicAtomicPointer::fetchAndStoreRelease(T *newValue) +-{ +- register T *originalValue; +- asm volatile("eieio\n" +- LPARX" %[originalValue]," _Q_VALUE "\n" +- STPCX" %[newValue]," _Q_VALUE "\n" +- "bne- $-8\n" +- : [originalValue] "=&r" (originalValue), +- _Q_VALUE_MEMORY_OPERAND +- : _Q_VALUE_REGISTER_OPERAND +- [newValue] "r" (newValue) +- : "cc", "memory"); +- return originalValue; ++ T *val; ++ Q_COMPILER_MEMORY_BARRIER; ++ val = __atomic_exchange_n(&_q_value, newValue, __ATOMIC_RELAXED); ++ Q_COMPILER_MEMORY_BARRIER; ++ return val; + } + + template + Q_INLINE_TEMPLATE T *QBasicAtomicPointer::fetchAndAddRelaxed(qptrdiff valueToAdd) + { +- register T *originalValue; +- register T *newValue; +- asm volatile(LPARX" %[originalValue]," _Q_VALUE "\n" +- "add %[newValue], %[originalValue], %[valueToAdd]\n" +- STPCX" %[newValue]," _Q_VALUE "\n" +- "bne- $-12\n" +- : [originalValue] "=&r" (originalValue), +- [newValue] "=&r" (newValue), +- _Q_VALUE_MEMORY_OPERAND +- : _Q_VALUE_REGISTER_OPERAND +- [valueToAdd] "r" (valueToAdd * sizeof(T)) +- : "cc", "memory"); +- return originalValue; +-} +- +-template +-Q_INLINE_TEMPLATE T *QBasicAtomicPointer::fetchAndAddAcquire(qptrdiff valueToAdd) +-{ +- register T *originalValue; +- register T *newValue; +- asm volatile(LPARX" %[originalValue]," _Q_VALUE "\n" +- "add %[newValue], %[originalValue], %[valueToAdd]\n" +- STPCX" %[newValue]," _Q_VALUE "\n" +- "bne- $-12\n" +- "isync\n" +- : [originalValue] "=&r" (originalValue), +- [newValue] "=&r" (newValue), +- _Q_VALUE_MEMORY_OPERAND +- : _Q_VALUE_REGISTER_OPERAND +- [valueToAdd] "r" (valueToAdd * sizeof(T)) +- : "cc", "memory"); +- return originalValue; +-} +- +-template +-Q_INLINE_TEMPLATE T *QBasicAtomicPointer::fetchAndAddRelease(qptrdiff valueToAdd) +-{ +- register T *originalValue; +- register T *newValue; +- asm volatile("eieio\n" +- LPARX" %[originalValue]," _Q_VALUE "\n" +- "add %[newValue], %[originalValue], %[valueToAdd]\n" +- STPCX" %[newValue]," _Q_VALUE "\n" +- "bne- $-12\n" +- : [originalValue] "=&r" (originalValue), +- [newValue] "=&r" (newValue), +- _Q_VALUE_MEMORY_OPERAND +- : _Q_VALUE_REGISTER_OPERAND +- [valueToAdd] "r" (valueToAdd * sizeof(T)) +- : "cc", "memory"); +- return originalValue; +-} +- +-#undef LPARX +-#undef STPCX +-#undef _Q_VALUE +-#undef _Q_VALUE_MEMORY_OPERAND +-#undef _Q_VALUE_REGISTER_OPERAND +- +-#else +- +-extern "C" { +- int q_atomic_test_and_set_int(volatile int *ptr, int expectedValue, int newValue); +- int q_atomic_test_and_set_acquire_int(volatile int *ptr, int expectedValue, int newValue); +- int q_atomic_test_and_set_release_int(volatile int *ptr, int expectedValue, int newValue); +- int q_atomic_test_and_set_ptr(volatile void *ptr, void *expectedValue, void *newValue); +- int q_atomic_test_and_set_acquire_ptr(volatile void *ptr, void *expectedValue, void *newValue); +- int q_atomic_test_and_set_release_ptr(volatile void *ptr, void *expectedValue, void *newValue); +- int q_atomic_increment(volatile int *); +- int q_atomic_decrement(volatile int *); +- int q_atomic_set_int(volatile int *, int); +- int q_atomic_fetch_and_store_acquire_int(volatile int *ptr, int newValue); +- int q_atomic_fetch_and_store_release_int(volatile int *ptr, int newValue); +- void *q_atomic_set_ptr(volatile void *, void *); +- int q_atomic_fetch_and_store_acquire_ptr(volatile void *ptr, void *newValue); +- int q_atomic_fetch_and_store_release_ptr(volatile void *ptr, void *newValue); +- int q_atomic_fetch_and_add_int(volatile int *ptr, int valueToAdd); +- int q_atomic_fetch_and_add_acquire_int(volatile int *ptr, int valueToAdd); +- int q_atomic_fetch_and_add_release_int(volatile int *ptr, int valueToAdd); +- void *q_atomic_fetch_and_add_ptr(volatile void *ptr, qptrdiff valueToAdd); +- void *q_atomic_fetch_and_add_acquire_ptr(volatile void *ptr, qptrdiff valueToAdd); +- void *q_atomic_fetch_and_add_release_ptr(volatile void *ptr, qptrdiff valueToAdd); +-} // extern "C" +- +- +-inline bool QBasicAtomicInt::ref() +-{ +- return q_atomic_increment(&_q_value) != 0; +-} +- +-inline bool QBasicAtomicInt::deref() +-{ +- return q_atomic_decrement(&_q_value) != 0; +-} +- +-inline bool QBasicAtomicInt::testAndSetRelaxed(int expectedValue, int newValue) +-{ +- return q_atomic_test_and_set_int(&_q_value, expectedValue, newValue) != 0; ++ T *val; ++ Q_COMPILER_MEMORY_BARRIER; ++ val = __atomic_fetch_add(&_q_value, valueToAdd, __ATOMIC_RELAXED); ++ Q_COMPILER_MEMORY_BARRIER; ++ return val; + } + + inline bool QBasicAtomicInt::testAndSetAcquire(int expectedValue, int newValue) + { +- return q_atomic_test_and_set_acquire_int(&_q_value, expectedValue, newValue) != 0; ++ bool returnValue = testAndSetRelaxed(expectedValue, newValue); ++ Q_DATA_MEMORY_BARRIER; ++ return returnValue; + } + + inline bool QBasicAtomicInt::testAndSetRelease(int expectedValue, int newValue) + { +- return q_atomic_test_and_set_release_int(&_q_value, expectedValue, newValue) != 0; ++ Q_DATA_MEMORY_BARRIER; ++ return testAndSetRelaxed(expectedValue, newValue); + } + +-inline int QBasicAtomicInt::fetchAndStoreRelaxed(int newValue) ++inline bool QBasicAtomicInt::testAndSetOrdered(int expectedValue, int newValue) + { +- return q_atomic_set_int(&_q_value, newValue); ++ Q_DATA_MEMORY_BARRIER; ++ bool returnValue = testAndSetRelaxed(expectedValue, newValue); ++ Q_COMPILER_MEMORY_BARRIER; ++ return returnValue; + } + + inline int QBasicAtomicInt::fetchAndStoreAcquire(int newValue) + { +- return q_atomic_fetch_and_store_acquire_int(&_q_value, newValue); ++ int returnValue = fetchAndStoreRelaxed(newValue); ++ Q_DATA_MEMORY_BARRIER; ++ return returnValue; + } + + inline int QBasicAtomicInt::fetchAndStoreRelease(int newValue) + { +- return q_atomic_fetch_and_store_release_int(&_q_value, newValue); ++ Q_DATA_MEMORY_BARRIER; ++ return fetchAndStoreRelaxed(newValue); + } + +-inline int QBasicAtomicInt::fetchAndAddRelaxed(int valueToAdd) ++inline int QBasicAtomicInt::fetchAndStoreOrdered(int newValue) + { +- return q_atomic_fetch_and_add_int(&_q_value, valueToAdd); ++ Q_DATA_MEMORY_BARRIER; ++ int returnValue = fetchAndStoreRelaxed(newValue); ++ Q_COMPILER_MEMORY_BARRIER; ++ return returnValue; + } + + inline int QBasicAtomicInt::fetchAndAddAcquire(int valueToAdd) + { +- return q_atomic_fetch_and_add_acquire_int(&_q_value, valueToAdd); ++ int returnValue = fetchAndAddRelaxed(valueToAdd); ++ Q_DATA_MEMORY_BARRIER; ++ return returnValue; + } + + inline int QBasicAtomicInt::fetchAndAddRelease(int valueToAdd) + { +- return q_atomic_fetch_and_add_release_int(&_q_value, valueToAdd); ++ Q_DATA_MEMORY_BARRIER; ++ return fetchAndAddRelaxed(valueToAdd); + } + +-template +-Q_INLINE_TEMPLATE bool QBasicAtomicPointer::testAndSetRelaxed(T *expectedValue, T *newValue) ++inline int QBasicAtomicInt::fetchAndAddOrdered(int valueToAdd) + { +- return q_atomic_test_and_set_ptr(&_q_value, expectedValue, newValue) != 0; ++ Q_DATA_MEMORY_BARRIER; ++ int returnValue = fetchAndAddRelaxed(valueToAdd); ++ Q_COMPILER_MEMORY_BARRIER; ++ return returnValue; + } + + template + Q_INLINE_TEMPLATE bool QBasicAtomicPointer::testAndSetAcquire(T *expectedValue, T *newValue) + { +- return q_atomic_test_and_set_acquire_ptr(&_q_value, expectedValue, newValue) != 0; ++ bool returnValue = testAndSetRelaxed(expectedValue, newValue); ++ Q_DATA_MEMORY_BARRIER; ++ return returnValue; + } + + template + Q_INLINE_TEMPLATE bool QBasicAtomicPointer::testAndSetRelease(T *expectedValue, T *newValue) + { +- return q_atomic_test_and_set_release_ptr(&_q_value, expectedValue, newValue) != 0; ++ Q_DATA_MEMORY_BARRIER; ++ return testAndSetRelaxed(expectedValue, newValue); + } + + template +-Q_INLINE_TEMPLATE T *QBasicAtomicPointer::fetchAndStoreRelaxed(T *newValue) ++Q_INLINE_TEMPLATE bool QBasicAtomicPointer::testAndSetOrdered(T *expectedValue, T *newValue) + { +- return reinterpret_cast(q_atomic_set_ptr(&_q_value, newValue)); ++ Q_DATA_MEMORY_BARRIER; ++ bool returnValue = testAndSetAcquire(expectedValue, newValue); ++ Q_COMPILER_MEMORY_BARRIER; ++ return returnValue; + } + + template + Q_INLINE_TEMPLATE T *QBasicAtomicPointer::fetchAndStoreAcquire(T *newValue) + { +- return reinterpret_cast(q_atomic_fetch_and_store_acquire_ptr(&_q_value, newValue)); ++ T *returnValue = fetchAndStoreRelaxed(newValue); ++ Q_DATA_MEMORY_BARRIER; ++ return returnValue; + } + + template + Q_INLINE_TEMPLATE T *QBasicAtomicPointer::fetchAndStoreRelease(T *newValue) + { +- return reinterpret_cast(q_atomic_fetch_and_store_release_ptr(&_q_value, newValue)); ++ Q_DATA_MEMORY_BARRIER; ++ return fetchAndStoreRelaxed(newValue); + } + + template +-Q_INLINE_TEMPLATE T *QBasicAtomicPointer::fetchAndAddRelaxed(qptrdiff valueToAdd) ++Q_INLINE_TEMPLATE T *QBasicAtomicPointer::fetchAndStoreOrdered(T *newValue) + { +- return reinterpret_cast(q_atomic_fetch_and_add_ptr(&_q_value, valueToAdd * sizeof(T))); ++ Q_DATA_MEMORY_BARRIER; ++ T *returnValue = fetchAndStoreRelaxed(newValue); ++ Q_COMPILER_MEMORY_BARRIER; ++ return returnValue; + } ++ + template + Q_INLINE_TEMPLATE T *QBasicAtomicPointer::fetchAndAddAcquire(qptrdiff valueToAdd) + { +- return reinterpret_cast(q_atomic_fetch_and_add_acquire_ptr(&_q_value, valueToAdd * sizeof(T))); ++ T *returnValue = fetchAndAddRelaxed(valueToAdd); ++ Q_DATA_MEMORY_BARRIER; ++ return returnValue; + } + + template + Q_INLINE_TEMPLATE T *QBasicAtomicPointer::fetchAndAddRelease(qptrdiff valueToAdd) + { +- return reinterpret_cast(q_atomic_fetch_and_add_release_ptr(&_q_value, valueToAdd * sizeof(T))); +-} +- +-#endif +- +-inline bool QBasicAtomicInt::testAndSetOrdered(int expectedValue, int newValue) +-{ +- return testAndSetAcquire(expectedValue, newValue); +-} +- +-inline int QBasicAtomicInt::fetchAndStoreOrdered(int newValue) +-{ +- return fetchAndStoreAcquire(newValue); +-} +- +-inline int QBasicAtomicInt::fetchAndAddOrdered(int valueToAdd) +-{ +- return fetchAndAddAcquire(valueToAdd); +-} +- +-template +-Q_INLINE_TEMPLATE bool QBasicAtomicPointer::testAndSetOrdered(T *expectedValue, T *newValue) +-{ +- return testAndSetAcquire(expectedValue, newValue); +-} +- +-template +-Q_INLINE_TEMPLATE T *QBasicAtomicPointer::fetchAndStoreOrdered(T *newValue) +-{ +- return fetchAndStoreAcquire(newValue); ++ Q_DATA_MEMORY_BARRIER; ++ return fetchAndAddRelaxed(valueToAdd); + } + + template + Q_INLINE_TEMPLATE T *QBasicAtomicPointer::fetchAndAddOrdered(qptrdiff valueToAdd) + { +- return fetchAndAddAcquire(valueToAdd); ++ Q_DATA_MEMORY_BARRIER; ++ T *returnValue = fetchAndAddRelaxed(valueToAdd); ++ Q_COMPILER_MEMORY_BARRIER; ++ return returnValue; + } + ++#undef Q_DATA_MEMORY_BARRIER ++#undef Q_COMPILER_MEMORY_BARRIER ++ + QT_END_NAMESPACE + + QT_END_HEADER +--- /dev/null ++++ qt/src/corelib/arch/powerpc/qatomic_powerpc.cpp +@@ -0,0 +1,70 @@ ++/**************************************************************************** ++** ++** Copyright (C) 2012, 2013 Digia Plc and/or its subsidiary(-ies). ++** Contact: http://www.qt-project.org/legal ++** ++** This file is part of the QtCore module of the Qt Toolkit. ++** ++** $QT_BEGIN_LICENSE:LGPL$ ++** Commercial License Usage ++** Licensees holding valid commercial Qt licenses may use this file in ++** accordance with the commercial license agreement provided with the ++** Software or, alternatively, in accordance with the terms contained in ++** a written agreement between you and Digia. For licensing terms and ++** conditions see http://qt.digia.com/licensing. For further information ++** use the contact form at http://qt.digia.com/contact-us. ++** ++** GNU Lesser General Public License Usage ++** Alternatively, this file may be used under the terms of the GNU Lesser ++** General Public License version 2.1 as published by the Free Software ++** Foundation and appearing in the file LICENSE.LGPL included in the ++** packaging of this file. Please review the following information to ++** ensure the GNU Lesser General Public License version 2.1 requirements ++** will be met: http://www.gnu.org/licenses/old-licenses/lgpl-2.1.html. ++** ++** In addition, as a special exception, Digia gives you certain additional ++** rights. These rights are described in the Digia Qt LGPL Exception ++** version 1.1, included in the file LGPL_EXCEPTION.txt in this package. ++** ++** GNU General Public License Usage ++** Alternatively, this file may be used under the terms of the GNU ++** General Public License version 3.0 as published by the Free Software ++** Foundation and appearing in the file LICENSE.GPL included in the ++** packaging of this file. Please review the following information to ++** ensure the GNU General Public License version 3.0 requirements will be ++** met: http://www.gnu.org/copyleft/gpl.html. ++** ++** ++** $QT_END_LICENSE$ ++** ++****************************************************************************/ ++ ++#include ++ ++#include ++#ifdef _POSIX_PRIORITY_SCHEDULING ++# include ++#endif ++#include ++ ++QT_BEGIN_NAMESPACE ++ ++QT_USE_NAMESPACE ++ ++Q_CORE_EXPORT void qt_atomic_yield(int *count) ++{ ++#ifdef _POSIX_PRIORITY_SCHEDULING ++ if((*count)++ < 50) { ++ sched_yield(); ++ } else ++#endif ++ { ++ struct timespec tm; ++ tm.tv_sec = 0; ++ tm.tv_nsec = 2000001; ++ nanosleep(&tm, NULL); ++ *count = 0; ++ } ++} ++ ++QT_END_NAMESPACE diff --git a/srcpkgs/qt/template b/srcpkgs/qt/template index a391551396b..a98c22fe978 100644 --- a/srcpkgs/qt/template +++ b/srcpkgs/qt/template @@ -123,6 +123,14 @@ do_configure() { _opts+=" -arch powerpc" _spec="powerpc64-linux-musl-c++" ;; + ppc) + _opts+=" -arch powerpc" + _spec="powerpc-linux-gnu-c++" + ;; + ppc-musl) + _opts+=" -arch powerpc" + _spec="powerpc-linux-musl-c++" + ;; *-musl) _opts+=" -arch arm" _spec="${XBPS_TARGET_MACHINE}-linux-musl-c++"