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ispc: rebuild against libLLVM-7

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Rasmus Thomsen 2018-09-19 23:10:58 +02:00 • committed by maxice8
parent 689e71dd33
commit 55d9d9173e
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6 changed files with 585 additions and 1 deletions
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53
srcpkgs/ispc/patches/87b5f3a25d19023ba6022b6175a366ab1703fd97.patch Normal file
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@ -0,0 +1,53 @@
From 87b5f3a25d19023ba6022b6175a366ab1703fd97 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Lukas=20B=C3=B6hm?= <suluke93@gmail.com>
Date: Tue, 10 Apr 2018 09:39:56 +0200
Subject: [PATCH] Include new header llvm/Transforms/Utils.h where needed
cbackend.cpp uses createLowerInvokePass
opt.cpp uses createPromoteMemoryToRegisterPass
These functions were moved to the named header with commit 328717, which will
be part of the llvm 7.0 release.
Phabricator url: https://reviews.llvm.org/rL328717
---
cbackend.cpp | 5 ++++-
opt.cpp | 3 +++
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/cbackend.cpp b/cbackend.cpp
index 095ba106..2da435f9 100644
--- a/cbackend.cpp
+++ b/cbackend.cpp
@@ -93,6 +93,9 @@
#include "llvm/CodeGen/IntrinsicLowering.h"
//#include "llvm/Target/Mangler.h"
#include "llvm/Transforms/Scalar.h"
+#if ISPC_LLVM_VERSION >= ISPC_LLVM_7_0
+ #include "llvm/Transforms/Utils.h"
+#endif
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCInstrInfo.h"
@@ -1629,7 +1632,7 @@ void CWriter::printConstant(llvm::Constant *CPV, bool Static) {
Out << "\"";
//const uint64_t *Ptr64 = CPV->getUniqueInteger().getRawData();
const uint64_t *Ptr64 = CI->getValue().getRawData();
- for (int i = 0; i < Ty->getPrimitiveSizeInBits(); i++) {
+ for (unsigned i = 0; i < Ty->getPrimitiveSizeInBits(); i++) {
Out << ((Ptr64[i / (sizeof (uint64_t) * 8)] >> (i % (sizeof (uint64_t) * 8))) & 1);
}
Out << "\"";
diff --git a/opt.cpp b/opt.cpp
index ef9e4c5d..1edbe33b 100644
--- a/opt.cpp
+++ b/opt.cpp
@@ -99,6 +99,9 @@
#include <llvm/ADT/SmallSet.h>
#include <llvm/Transforms/Scalar.h>
#include <llvm/Transforms/IPO.h>
+#if ISPC_LLVM_VERSION >= ISPC_LLVM_7_0
+ #include "llvm/Transforms/Utils.h"
+#endif
#include <llvm/Transforms/Utils/BasicBlockUtils.h>
#include <llvm/Target/TargetOptions.h>
#if ISPC_LLVM_VERSION == ISPC_LLVM_3_2

27
srcpkgs/ispc/patches/9d82a8023dc4b2a0dcda04b701f685c08adc1b9b.patch Normal file
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@ -0,0 +1,27 @@
From 9d82a8023dc4b2a0dcda04b701f685c08adc1b9b Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Lukas=20B=C3=B6hm?= <suluke93@gmail.com>
Date: Sun, 18 Feb 2018 16:14:32 +0100
Subject: [PATCH] [NFC] Fix for llvm upstream change 325155
Phabricator: https://reviews.llvm.org/rL325155
GitHub: https://github.com/llvm-mirror/llvm/commit/06d6207c1c631716d4e6310246d198aa9e05c0d0
---
module.cpp | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/module.cpp b/module.cpp
index 8dc03a07..11946a76 100644
--- a/module.cpp
+++ b/module.cpp
@@ -1490,7 +1490,11 @@ Module::writeBitcode(llvm::Module *module, const char *outFileName) {
}
else
#endif /* ISPC_NVPTX_ENABLED */
+#if ISPC_LLVM_VERSION < ISPC_LLVM_7_0
llvm::WriteBitcodeToFile(module, fos);
+#else
+ llvm::WriteBitcodeToFile(*module, fos);
+#endif
return true;
}

361
srcpkgs/ispc/patches/a60ce81c4f49200d02e6cf724ff4a8d8a4fd939d.patch Normal file
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@ -0,0 +1,361 @@
From a60ce81c4f49200d02e6cf724ff4a8d8a4fd939d Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Lukas=20B=C3=B6hm?= <suluke93@gmail.com>
Date: Tue, 9 Jan 2018 14:05:39 +0100
Subject: [PATCH] Patches for llvm 7.0 support
The changes of this commit are completely analogue to the changes
introduced in 6dc0ccc404c877531f06b42881272f15f4209b17.
Please note that there isn't a RELEASE_600 tag on llvm.org yet (see
https://llvm.org/svn/llvm-project/llvm/tags/). Therefore, the change in
alloy.py is a bit ahead of time as of now.
---
LICENSE.txt | 2 +-
alloy.py | 19 ++++++++++++-------
builtins/dispatch.ll | 4 +++-
builtins/target-knl.ll | 6 +++++-
builtins/target-skx.ll | 6 +++++-
builtins/util-nvptx.m4 | 2 +-
builtins/util.m4 | 14 +++++++++++++-
docs/ispc.rst | 2 +-
docs/perfguide.rst | 2 +-
docs/template-news.txt | 2 +-
docs/template-perf.txt | 2 +-
docs/template.txt | 2 +-
ispc.h | 4 ++--
ispc_version.h | 5 +++--
14 files changed, 50 insertions(+), 22 deletions(-)
diff --git a/LICENSE.txt b/LICENSE.txt
index a9c031f2..36afbe7d 100644
--- a/LICENSE.txt
+++ b/LICENSE.txt
@@ -1,4 +1,4 @@
-Copyright (c) 2010-2017, Intel Corporation
+Copyright (c) 2010-2018, Intel Corporation
All rights reserved.
Redistribution and use in source and binary forms, with or without
diff --git a/alloy.py b/alloy.py
index 62743d2e..310d95f3 100755
--- a/alloy.py
+++ b/alloy.py
@@ -1,6 +1,6 @@
#!/usr/bin/python
#
-# Copyright (c) 2013-2017, Intel Corporation
+# Copyright (c) 2013-2018, Intel Corporation
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
@@ -137,8 +137,11 @@ def checkout_LLVM(component, use_git, version_LLVM, revision, target_dir, from_v
if version_LLVM == "trunk":
SVN_PATH="trunk"
GIT_BRANCH="master"
+ elif version_LLVM == "6_0":
+ SVN_PATH="tags/RELEASE_600/final"
+ GIT_BRANCH="release_60"
elif version_LLVM == "5_0":
- SVN_PATH="tags/RELEASE_500/final"
+ SVN_PATH="tags/RELEASE_501/final"
GIT_BRANCH="release_50"
elif version_LLVM == "4_0":
SVN_PATH="tags/RELEASE_401/final"
@@ -554,8 +557,10 @@ def build_ispc(version_LLVM, make):
temp = "4_0"
if version_LLVM == "5.0":
temp = "5_0"
- if version_LLVM == "trunk":
+ if version_LLVM == "6.0":
temp = "6_0"
+ if version_LLVM == "trunk":
+ temp = "7_0"
os.environ["LLVM_VERSION"] = "LLVM_" + temp
try_do_LLVM("clean ISPC for building", "msbuild ispc.vcxproj /t:clean", True)
try_do_LLVM("build ISPC with LLVM version " + version_LLVM + " ", "msbuild ispc.vcxproj /V:m /p:Platform=Win32 /p:Configuration=Release /t:rebuild", True)
@@ -695,7 +700,7 @@ def validation_run(only, only_targets, reference_branch, number, notify, update,
archs.append("x86-64")
if "native" in only:
sde_targets_t = []
- for i in ["3.2", "3.3", "3.4", "3.5", "3.6", "3.7", "3.8", "3.9", "4.0", "5.0", "trunk"]:
+ for i in ["3.2", "3.3", "3.4", "3.5", "3.6", "3.7", "3.8", "3.9", "4.0", "5.0", "6.0", "trunk"]:
if i in only:
LLVM.append(i)
if "current" in only:
@@ -981,7 +986,7 @@ def Main():
if os.environ.get("SMTP_ISPC") == None:
error("you have no SMTP_ISPC in your environment for option notify", 1)
if options.only != "":
- test_only_r = " 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 4.0 5.0 trunk current build stability performance x86 x86-64 x86_64 -O0 -O2 native debug nodebug "
+ test_only_r = " 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 4.0 5.0 6.0 trunk current build stability performance x86 x86-64 x86_64 -O0 -O2 native debug nodebug "
test_only = options.only.split(" ")
for iterator in test_only:
if not (" " + iterator + " " in test_only_r):
@@ -1094,7 +1099,7 @@ def format_epilog(self, formatter):
llvm_group = OptionGroup(parser, "Options for building LLVM",
"These options must be used with -b option.")
llvm_group.add_option('--version', dest='version',
- help='version of llvm to build: 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 4.0 5.0 trunk. Default: trunk', default="trunk")
+ help='version of llvm to build: 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 4.0 5.0 6.0 trunk. Default: trunk', default="trunk")
llvm_group.add_option('--with-gcc-toolchain', dest='gcc_toolchain_path',
help='GCC install dir to use when building clang. It is important to set when ' +
'you have alternative gcc installation. Note that otherwise gcc from standard ' +
@@ -1137,7 +1142,7 @@ def format_epilog(self, formatter):
run_group.add_option('--only', dest='only',
help='set types of tests. Possible values:\n' +
'-O0, -O2, x86, x86-64, stability (test only stability), performance (test only performance),\n' +
- 'build (only build with different LLVM), 3.2, 3.3, 3.4, 3.5, 3.6, 3.7, 3.8, 3.9, 4.0, 5.0, trunk, native (do not use SDE),\n' +
+ 'build (only build with different LLVM), 3.2, 3.3, 3.4, 3.5, 3.6, 3.7, 3.8, 3.9, 4.0, 5.0, 6.0, trunk, native (do not use SDE),\n' +
'current (do not rebuild ISPC), debug (only with debug info), nodebug (only without debug info, default).',
default="")
run_group.add_option('--perf_LLVM', dest='perf_llvm',
diff --git a/builtins/dispatch.ll b/builtins/dispatch.ll
index 381608ee..03c70012 100644
--- a/builtins/dispatch.ll
+++ b/builtins/dispatch.ll
@@ -1,4 +1,4 @@
-;; Copyright (c) 2011-2017, Intel Corporation
+;; Copyright (c) 2011-2018, Intel Corporation
;; All rights reserved.
;;
;; Redistribution and use in source and binary forms, with or without
@@ -157,6 +157,8 @@ define(`PTR_OP_ARGS',
LLVM_VERSION, LLVM_5_0,
``$1 , $1 *'',
LLVM_VERSION, LLVM_6_0,
+ ``$1 , $1 *'',
+ LLVM_VERSION, LLVM_7_0,
``$1 , $1 *'',
``$1 *''
)
diff --git a/builtins/target-knl.ll b/builtins/target-knl.ll
index ac10442b..96d5f782 100644
--- a/builtins/target-knl.ll
+++ b/builtins/target-knl.ll
@@ -1,4 +1,4 @@
-;; Copyright (c) 2015-2017, Intel Corporation
+;; Copyright (c) 2015-2018, Intel Corporation
;; All rights reserved.
;;
;; Redistribution and use in source and binary forms, with or without
@@ -42,6 +42,8 @@ ifelse(LLVM_VERSION, LLVM_3_7,
LLVM_VERSION, LLVM_5_0,
`include(`target-avx512-common.ll')',
LLVM_VERSION, LLVM_6_0,
+ `include(`target-avx512-common.ll')'
+ LLVM_VERSION, LLVM_7_0,
`include(`target-avx512-common.ll')'
)
@@ -72,6 +74,8 @@ ifelse(LLVM_VERSION, LLVM_3_7,
LLVM_VERSION, LLVM_5_0,
rcp_rsqrt_varying_float_knl(),
LLVM_VERSION, LLVM_6_0,
+ rcp_rsqrt_varying_float_knl()
+ LLVM_VERSION, LLVM_7_0,
rcp_rsqrt_varying_float_knl()
)
diff --git a/builtins/target-skx.ll b/builtins/target-skx.ll
index 442fc251..b71a768a 100644
--- a/builtins/target-skx.ll
+++ b/builtins/target-skx.ll
@@ -1,4 +1,4 @@
-;; Copyright (c) 2016-2017, Intel Corporation
+;; Copyright (c) 2016-2018, Intel Corporation
;; All rights reserved.
;;
;; Redistribution and use in source and binary forms, with or without
@@ -41,6 +41,8 @@ ifelse(LLVM_VERSION, LLVM_3_8,
LLVM_VERSION, LLVM_5_0,
`include(`target-avx512-common.ll')',
LLVM_VERSION, LLVM_6_0,
+ `include(`target-avx512-common.ll')'
+ LLVM_VERSION, LLVM_7_0,
`include(`target-avx512-common.ll')'
)
@@ -92,6 +94,8 @@ ifelse(LLVM_VERSION, LLVM_3_8,
LLVM_VERSION, LLVM_5_0,
rcp_rsqrt_varying_float_skx(),
LLVM_VERSION, LLVM_6_0,
+ rcp_rsqrt_varying_float_skx()
+ LLVM_VERSION, LLVM_7_0,
rcp_rsqrt_varying_float_skx()
)
diff --git a/builtins/util-nvptx.m4 b/builtins/util-nvptx.m4
index bbd46b72..2dc394e1 100644
--- a/builtins/util-nvptx.m4
+++ b/builtins/util-nvptx.m4
@@ -1,4 +1,4 @@
-;; Copyright (c) 2010-2017, Intel Corporation
+;; Copyright (c) 2010-2018, Intel Corporation
;; All rights reserved.
;;
;; Redistribution and use in source and binary forms, with or without
diff --git a/builtins/util.m4 b/builtins/util.m4
index e0ade0a8..d251c2ff 100644
--- a/builtins/util.m4
+++ b/builtins/util.m4
@@ -1,4 +1,4 @@
-;; Copyright (c) 2010-2017, Intel Corporation
+;; Copyright (c) 2010-2018, Intel Corporation
;; All rights reserved.
;;
;; Redistribution and use in source and binary forms, with or without
@@ -63,6 +63,8 @@ define(`PTR_OP_ARGS',
LLVM_VERSION, LLVM_5_0,
``$1 , $1 *'',
LLVM_VERSION, LLVM_6_0,
+ ``$1 , $1 *'',
+ LLVM_VERSION, LLVM_7_0,
``$1 , $1 *'',
``$1 *''
)
@@ -81,6 +83,8 @@ define(`MdORi64',
``i64'',
LLVM_VERSION, LLVM_6_0,
``i64'',
+ LLVM_VERSION, LLVM_7_0,
+ ``i64'',
``double''
)
)
@@ -96,6 +100,8 @@ define(`MfORi32',
``i32'',
LLVM_VERSION, LLVM_6_0,
``i32'',
+ LLVM_VERSION, LLVM_7_0,
+ ``i32'',
``float''
)
)
@@ -1613,6 +1619,9 @@ define <$1 x $2> @__atomic_compare_exchange_$3_global($2* %ptr, <$1 x $2> %cmp,
',LLVM_VERSION,LLVM_6_0,`
%r_LANE_ID_t = cmpxchg $2 * %ptr, $2 %cmp_LANE_ID, $2 %val_LANE_ID seq_cst seq_cst
%r_LANE_ID = extractvalue { $2, i1 } %r_LANE_ID_t, 0
+ ',LLVM_VERSION,LLVM_7_0,`
+ %r_LANE_ID_t = cmpxchg $2 * %ptr, $2 %cmp_LANE_ID, $2 %val_LANE_ID seq_cst seq_cst
+ %r_LANE_ID = extractvalue { $2, i1 } %r_LANE_ID_t, 0
',`
%r_LANE_ID = cmpxchg $2 * %ptr, $2 %cmp_LANE_ID, $2 %val_LANE_ID seq_cst
')
@@ -1650,6 +1659,9 @@ define $2 @__atomic_compare_exchange_uniform_$3_global($2* %ptr, $2 %cmp,
',LLVM_VERSION,LLVM_6_0,`
%r_t = cmpxchg $2 * %ptr, $2 %cmp, $2 %val seq_cst seq_cst
%r = extractvalue { $2, i1 } %r_t, 0
+ ',LLVM_VERSION,LLVM_7_0,`
+ %r_t = cmpxchg $2 * %ptr, $2 %cmp, $2 %val seq_cst seq_cst
+ %r = extractvalue { $2, i1 } %r_t, 0
',`
%r = cmpxchg $2 * %ptr, $2 %cmp, $2 %val seq_cst
')
diff --git a/docs/ispc.rst b/docs/ispc.rst
index db517e4a..2b59f68f 100644
--- a/docs/ispc.rst
+++ b/docs/ispc.rst
@@ -5172,7 +5172,7 @@ countries.
* Other names and brands may be claimed as the property of others.
-Copyright(C) 2011-2017, Intel Corporation. All rights reserved.
+Copyright(C) 2011-2018, Intel Corporation. All rights reserved.
Optimization Notice
diff --git a/docs/perfguide.rst b/docs/perfguide.rst
index 8cbc6bfd..45cbd6dd 100644
--- a/docs/perfguide.rst
+++ b/docs/perfguide.rst
@@ -786,7 +786,7 @@ countries.
* Other names and brands may be claimed as the property of others.
-Copyright(C) 2011-2017, Intel Corporation. All rights reserved.
+Copyright(C) 2011-2018, Intel Corporation. All rights reserved.
Optimization Notice
diff --git a/docs/template-news.txt b/docs/template-news.txt
index 629c92b6..09ced252 100644
--- a/docs/template-news.txt
+++ b/docs/template-news.txt
@@ -57,7 +57,7 @@
%(body)s
</div>
<div class="clearfix"></div>
- <div id="footer"> &copy; 2011-2017 <strong>Intel Corporation</strong> | Valid <a href="http://validator.w3.org/check?uri=referer">XHTML</a> | <a href="http://jigsaw.w3.org/css-validator/check/referer">CSS</a> | ClearBlue by: <a href="http://www.themebin.com/">ThemeBin</a>
+ <div id="footer"> &copy; 2011-2018 <strong>Intel Corporation</strong> | Valid <a href="http://validator.w3.org/check?uri=referer">XHTML</a> | <a href="http://jigsaw.w3.org/css-validator/check/referer">CSS</a> | ClearBlue by: <a href="http://www.themebin.com/">ThemeBin</a>
<!-- Please Do Not remove this link, thank u -->
</div>
</div>
diff --git a/docs/template-perf.txt b/docs/template-perf.txt
index 2204c1c4..1eb1200f 100644
--- a/docs/template-perf.txt
+++ b/docs/template-perf.txt
@@ -57,7 +57,7 @@
%(body)s
</div>
<div class="clearfix"></div>
- <div id="footer"> &copy; 2011-2017 <strong>Intel Corporation</strong> | Valid <a href="http://validator.w3.org/check?uri=referer">XHTML</a> | <a href="http://jigsaw.w3.org/css-validator/check/referer">CSS</a> | ClearBlue by: <a href="http://www.themebin.com/">ThemeBin</a>
+ <div id="footer"> &copy; 2011-2018 <strong>Intel Corporation</strong> | Valid <a href="http://validator.w3.org/check?uri=referer">XHTML</a> | <a href="http://jigsaw.w3.org/css-validator/check/referer">CSS</a> | ClearBlue by: <a href="http://www.themebin.com/">ThemeBin</a>
<!-- Please Do Not remove this link, thank u -->
</div>
</div>
diff --git a/docs/template.txt b/docs/template.txt
index 2b75251f..52249811 100644
--- a/docs/template.txt
+++ b/docs/template.txt
@@ -57,7 +57,7 @@
%(body)s
</div>
<div class="clearfix"></div>
- <div id="footer"> &copy; 2011-2017 <strong>Intel Corporation</strong> | Valid <a href="http://validator.w3.org/check?uri=referer">XHTML</a> | <a href="http://jigsaw.w3.org/css-validator/check/referer">CSS</a> | ClearBlue by: <a href="http://www.themebin.com/">ThemeBin</a>
+ <div id="footer"> &copy; 2011-2018 <strong>Intel Corporation</strong> | Valid <a href="http://validator.w3.org/check?uri=referer">XHTML</a> | <a href="http://jigsaw.w3.org/css-validator/check/referer">CSS</a> | ClearBlue by: <a href="http://www.themebin.com/">ThemeBin</a>
<!-- Please Do Not remove this link, thank u -->
</div>
</div>
diff --git a/ispc.h b/ispc.h
index bde5445f..0d84196f 100644
--- a/ispc.h
+++ b/ispc.h
@@ -1,5 +1,5 @@
/*
- Copyright (c) 2010-2017, Intel Corporation
+ Copyright (c) 2010-2018, Intel Corporation
All rights reserved.
Redistribution and use in source and binary forms, with or without
@@ -41,7 +41,7 @@
#include "ispc_version.h"
#if ISPC_LLVM_VERSION < OLDEST_SUPPORTED_LLVM || ISPC_LLVM_VERSION > LATEST_SUPPORTED_LLVM
-#error "Only LLVM 3.2, 3.3, 3.4, 3.5, 3.6, 3.7, 3.8, 3.9, 4.0, 5.0 and 6.0 development branch are supported"
+#error "Only LLVM 3.2, 3.3, 3.4, 3.5, 3.6, 3.7, 3.8, 3.9, 4.0, 5.0, 6.0 and 7.0 development branch are supported"
#endif
#if defined(_WIN32) || defined(_WIN64)
diff --git a/ispc_version.h b/ispc_version.h
index 69d58694..91c6adc0 100644
--- a/ispc_version.h
+++ b/ispc_version.h
@@ -1,5 +1,5 @@
/*
- Copyright (c) 2015-2017, Intel Corporation
+ Copyright (c) 2015-2018, Intel Corporation
All rights reserved.
Redistribution and use in source and binary forms, with or without
@@ -54,9 +54,10 @@
#define ISPC_LLVM_4_0 40000
#define ISPC_LLVM_5_0 50000
#define ISPC_LLVM_6_0 60000
+#define ISPC_LLVM_7_0 70000
#define OLDEST_SUPPORTED_LLVM ISPC_LLVM_3_2
-#define LATEST_SUPPORTED_LLVM ISPC_LLVM_6_0
+#define LATEST_SUPPORTED_LLVM ISPC_LLVM_7_0
#ifdef __ispc__xstr
#undef __ispc__xstr

68
srcpkgs/ispc/patches/dbc264e817992dd70ae72c77149b274cfc888b99.patch Normal file
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@ -0,0 +1,68 @@
From dbc264e817992dd70ae72c77149b274cfc888b99 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Lukas=20B=C3=B6hm?= <suluke93@gmail.com>
Date: Tue, 9 Jan 2018 17:08:33 +0100
Subject: [PATCH] Fix issues pointed out by @dbabokin
---
alloy.py | 2 +-
builtins/target-knl.ll | 4 ++--
builtins/target-skx.ll | 4 ++--
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/alloy.py b/alloy.py
index 310d95f3..1eb743ee 100755
--- a/alloy.py
+++ b/alloy.py
@@ -138,7 +138,7 @@ def checkout_LLVM(component, use_git, version_LLVM, revision, target_dir, from_v
SVN_PATH="trunk"
GIT_BRANCH="master"
elif version_LLVM == "6_0":
- SVN_PATH="tags/RELEASE_600/final"
+ SVN_PATH="branches/release_60"
GIT_BRANCH="release_60"
elif version_LLVM == "5_0":
SVN_PATH="tags/RELEASE_501/final"
diff --git a/builtins/target-knl.ll b/builtins/target-knl.ll
index 96d5f782..9b0cef77 100644
--- a/builtins/target-knl.ll
+++ b/builtins/target-knl.ll
@@ -42,7 +42,7 @@ ifelse(LLVM_VERSION, LLVM_3_7,
LLVM_VERSION, LLVM_5_0,
`include(`target-avx512-common.ll')',
LLVM_VERSION, LLVM_6_0,
- `include(`target-avx512-common.ll')'
+ `include(`target-avx512-common.ll')',
LLVM_VERSION, LLVM_7_0,
`include(`target-avx512-common.ll')'
)
@@ -74,7 +74,7 @@ ifelse(LLVM_VERSION, LLVM_3_7,
LLVM_VERSION, LLVM_5_0,
rcp_rsqrt_varying_float_knl(),
LLVM_VERSION, LLVM_6_0,
- rcp_rsqrt_varying_float_knl()
+ rcp_rsqrt_varying_float_knl(),
LLVM_VERSION, LLVM_7_0,
rcp_rsqrt_varying_float_knl()
)
diff --git a/builtins/target-skx.ll b/builtins/target-skx.ll
index b71a768a..fd9cebb8 100644
--- a/builtins/target-skx.ll
+++ b/builtins/target-skx.ll
@@ -41,7 +41,7 @@ ifelse(LLVM_VERSION, LLVM_3_8,
LLVM_VERSION, LLVM_5_0,
`include(`target-avx512-common.ll')',
LLVM_VERSION, LLVM_6_0,
- `include(`target-avx512-common.ll')'
+ `include(`target-avx512-common.ll')',
LLVM_VERSION, LLVM_7_0,
`include(`target-avx512-common.ll')'
)
@@ -94,7 +94,7 @@ ifelse(LLVM_VERSION, LLVM_3_8,
LLVM_VERSION, LLVM_5_0,
rcp_rsqrt_varying_float_skx(),
LLVM_VERSION, LLVM_6_0,
- rcp_rsqrt_varying_float_skx()
+ rcp_rsqrt_varying_float_skx(),
LLVM_VERSION, LLVM_7_0,
rcp_rsqrt_varying_float_skx()
)

75
srcpkgs/ispc/patches/ef49a0ae57ce16c71172390dc123485da0f1a4fd.patch Normal file
View file

@ -0,0 +1,75 @@
From ef49a0ae57ce16c71172390dc123485da0f1a4fd Mon Sep 17 00:00:00 2001
From: Dmitry Babokin <dmitry.y.babokin@intel.com>
Date: Tue, 5 Jun 2018 15:27:00 -0700
Subject: [PATCH] Compile time fixes
---
cbackend.cpp | 8 ++++++--
module.cpp | 9 +++++++++
opt.cpp | 1 +
3 files changed, 16 insertions(+), 2 deletions(-)
diff --git a/cbackend.cpp b/cbackend.cpp
index 2da435f9..8b548dfa 100644
--- a/cbackend.cpp
+++ b/cbackend.cpp
@@ -4190,8 +4190,10 @@ void CWriter::lowerIntrinsics(llvm::Function &F) {
#define Intrinsic llvm::Intrinsic
#if ISPC_LLVM_VERSION == ISPC_LLVM_3_2
#include "llvm/Intrinsics.gen"
-#else /* LLVM 3.3+ */
+#elif ISPC_LLVM_VERSION <= ISPC_LLVM_6_0 /* LLVM 3.3-6.0 */
#include "llvm/IR/Intrinsics.gen"
+#else /* LLVM 7.0+ */
+ #include "llvm/IR/Intrinsics.h"
#endif
#undef Intrinsic
#undef GET_GCC_BUILTIN_NAME
@@ -4422,8 +4424,10 @@ bool CWriter::visitBuiltinCall(llvm::CallInst &I, llvm::Intrinsic::ID ID,
#define Intrinsic llvm::Intrinsic
#if ISPC_LLVM_VERSION == ISPC_LLVM_3_2
#include "llvm/Intrinsics.gen"
-#else /* LLVM 3.3+ */
+#elif ISPC_LLVM_VERSION <= ISPC_LLVM_6_0 /* LLVM 3.3-6.0 */
#include "llvm/IR/Intrinsics.gen"
+#else /* LLVM 7.0+ */
+ #include "llvm/IR/Intrinsics.h"
#endif
#undef Intrinsic
#undef GET_GCC_BUILTIN_NAME
diff --git a/module.cpp b/module.cpp
index 4aa459df..71bdf663 100644
--- a/module.cpp
+++ b/module.cpp
@@ -1573,10 +1573,19 @@ Module::writeObjectFileOrAssembly(llvm::TargetMachine *targetMachine,
#else // LLVM 3.7+
llvm::raw_fd_ostream &fos(of->os());
#endif
+#if ISPC_LLVM_VERSION <= ISPC_LLVM_6_0
if (targetMachine->addPassesToEmitFile(pm, fos, fileType)) {
fprintf(stderr, "Fatal error adding passes to emit object file!");
exit(1);
}
+#else // LLVM 7.0+
+ // Third parameter is for generation of .dwo file, which is separate DWARF
+ // file for ELF targets. We don't support it currently.
+ if (targetMachine->addPassesToEmitFile(pm, fos, nullptr, fileType)) {
+ fprintf(stderr, "Fatal error adding passes to emit object file!");
+ exit(1);
+ }
+#endif
// Finally, run the passes to emit the object file/assembly
pm.run(*module);
diff --git a/opt.cpp b/opt.cpp
index 1edbe33b..e26eccfd 100644
--- a/opt.cpp
+++ b/opt.cpp
@@ -101,6 +101,7 @@
#include <llvm/Transforms/IPO.h>
#if ISPC_LLVM_VERSION >= ISPC_LLVM_7_0
#include "llvm/Transforms/Utils.h"
+ #include "llvm/Transforms/InstCombine/InstCombine.h"
#endif
#include <llvm/Transforms/Utils/BasicBlockUtils.h>
#include <llvm/Target/TargetOptions.h>

2
srcpkgs/ispc/template
View file

@ -1,7 +1,7 @@
# Template file for 'ispc' # Template file for 'ispc'
pkgname=ispc pkgname=ispc
version=1.9.2 version=1.9.2
revision=2 revision=3
only_for_archs="i686 x86_64" only_for_archs="i686 x86_64"
build_style=gnu-makefile build_style=gnu-makefile
hostmakedepends="llvm clang python m4 bison flex" hostmakedepends="llvm clang python m4 bison flex"